1. Field of the Invention
The present invention relates to a wireless video transmission system that wirelessly transmits a video signal, and more particularly to a wireless video transmission system that wirelessly transmits an analog video signal fed from the outside and restores the analog video signal on a receiving side thereof.
2. Description of Related Art
A conventional wireless video transmission system includes a wireless video transmitting apparatus 300 and a wireless video receiving apparatus 400. FIG. 3 is a block diagram showing the structure of the wireless video transmitting apparatus 300, and FIG. 4 is a block diagram showing the structure of the wireless video receiving apparatus 400. A video tape recorder (VTR), for example, is connected to an input side of the wireless video transmitting apparatus 300, and a television, for example, is connected to an output side of the wireless video receiving apparatus 400.
In the wireless video transmitting apparatus 300 shown in FIG. 3, an analog video signal outputted from the video tape recorder (VTR), for example, which is not shown in the drawing, is fed to an analog video signal input portion 302. The above-mentioned analog video signal is, for example, an NTSC (National Television Standards Committee) analog video signal recorded on video tape (recording medium). Hereinafter, the description will be continued on the assumption that the analog video signal to be fed to the analog video signal input portion 302 is an NTSC analog video signal.
The frequency of the horizontal synchronizing signal of the analog video signal fed to the analog video signal input portion 302 is in principle 15.734 kHz of the NTSC system, and accordingly the frequency corresponding to 1 dot of the analog video signal fed to the analog video signal input portion 302, that is, the frequency of a video dot clock of the analog video signal fed to the analog video signal input portion 302 is in principle 13.5 MHz (megahertz).
The analog video signal input portion 302 converts the analog video signal fed thereto to a digital video signal by using a sampling clock of 27 MHz (twice the frequency of 13.5 MHz).
The digital video signal converted by the analog video signal input portion 302 is compressed by a digital video signal compression portion 303. The compressed digital video signal is converted by a wireless control portion 304 to baseband signals of wireless packets, and is then converted to an analog in-phase and quadrature signal by a baseband processing circuit portion 305. The analog in-phase and quadrature signal is converted to a high-frequency signal by a wireless portion 306, and is then radiated (sent) from an antenna 307 as radio waves.
In the wireless video receiving apparatus 400 shown in FIG. 4, a high-frequency signal sent from the antenna 307 is received by an antenna 407, and is then converted to an analog in-phase and quadrature signal by a wireless portion 406. The converted in-phase and quadrature signal is converted to baseband signals by a baseband processing circuit portion 405, and is then converted to a compressed digital video signal by a wireless control portion 404. The compressed digital video signal is fed to a digital video signal decompression portion 403.
A voltage-controlled clock generation portion 408 is built as a phase locked loop (PLL) circuit composed of a phase comparator, a loop filter, and a voltage-controlled oscillator (VCXO) (none of which are not shown in the drawing). The voltage-controlled clock generation portion 408 generates a video dot clock of a frequency (in principle, 27 MHz) just twice the frequency of the video dot clock of the analog video signal fed to the analog video signal input portion 302 by referring to a control voltage fed from the digital video signal decompression portion 403.
The digital video signal decompression portion 403 decompresses the compressed digital video signal and thereby produces the original, uncompressed digital video signal while generating a horizontal synchronizing signal and a vertical synchronizing signal by using the video dot clock fed from the voltage-controlled clock generation portion 408. In a case where the frequency of the sampling clock used by the analog video signal input portion 302 is just 27 MHz, a frequency fH and a frequency fV of the horizontal synchronizing signal and the vertical synchronizing signal, respectively, generated by the digital video signal decompression portion 403 are given by formulae (1) and (2) below.fH=27 MHz÷1716=15.734 kHz  (1)fV=fH÷(525÷2)=59.94 Hz  (2)
The original, uncompressed digital video signal produced by the digital video signal decompression portion 403 is converted to an analog video signal by an analog video signal output portion 402, is then fed to a television or the like connected to the apparatus, and then video is reproduced therefrom.
Note that a main control portion 301 controls overall operation of the analog video signal input portion 302, the digital video signal compression portion 303, the wireless control portion 304, the baseband processing circuit portion 305, and the wireless portion 306. A main control portion 401 controls overall operation of the analog video signal output portion 402, the digital video signal decompression portion 403, the wireless control portion 404, the baseband processing circuit portion 405, and the wireless portion 406.
JP-A-2003-309594 (hereinafter referred to as Patent Publication 1) discloses a video information transmission system that transmits encoded video information. The video information transmission system includes dividing means that divides encoded video information into a plurality of divided data, a plurality of transmission terminals connected to the dividing means, the transmission terminals that transmit the divided data, a plurality of or a single base station that receives signals from the plurality of transmission terminals, a network to which the plurality of or the single base station is connected, switching receiving means that is connected to the network, the switching receiving means that receives the divided data received by the base station by using a plurality of lines, restoring means that obtains the divided data from the switching receiving means and restores the original video information, and decoding means that decodes the restored video information. The dividing means divides the encoded video information according to the level of importance thereof. Specifically, data with a high level of importance is divided or duplicated by the dividing means so that it can be transmitted over a plurality of transmission paths, and is then repeatedly transmitted by using a plurality of transmission terminals. On the other hand, data of a low level of importance is divided by the dividing means in such a way that it is transmitted over a single transmission path, and is then transmitted by using a single transmission terminal.
The frequency of the horizontal synchronizing signal of the analog video signal fed to the analog video signal input portion 302 is in principle equal to the specified frequency (fundamental frequency) of 15.734 kHz. In practice, however, it can slightly vary therefrom, and therefore the frequency of the video dot clock of the analog video signal fed to the analog video signal input portion 302 can also slightly vary from 13.5 MHz.
In general, the clock produced by the voltage-controlled oscillator (VCXO) is made to vary within a limited range (for example, within ±100 ppm of the reference frequency). When the analog video signal fed to the analog video signal input portion 302 is a signal obtained by reception of broadcasting, the frequency of the horizontal synchronizing signal varies from the specified frequency (15.734 kHz) only by a relatively small amount. This permits the voltage-controlled oscillator (VCXO) provided in the voltage-controlled clock generation portion 408 to generate a video dot clock having a frequency just twice the frequency of the video dot clock of the analog video signal fed to the analog video signal input portion 302.
However, when a source of the analog video signal is a video tape recorder, for example, the frequency of the horizontal synchronizing signal of the analog video signal fed to the analog video signal input portion 302 can vary from the specified frequency (15.734 kHz) by a relatively large amount (for example, ±120 ppm) due to variations in the speed at which the video tape runs, for example.
In that case, the voltage-controlled oscillator (VXCO) provided in the voltage-controlled clock generation portion 408 cannot generate a video dot clock having a frequency just twice the frequency of the video dot clock of the analog video signal fed to the analog video signal input portion 302, that is, a video dot clock required to decompress the compressed digital video signal. This results in a difference between the frequencies of the sampling clock used in the analog video signal input portion 302 and the video dot clock used for decompression, leading to an excess or deficiency of the amount of data when decompression is performed. This makes it impossible to obtain a normal digital video signal in the digital video signal decompression portion 403, and consequently it is impossible to reproduce a normal analog video signal in the analog video signal output portion 402.
On the other hand, the conventional example disclosed in Patent Publication 1 is a technique aimed at realizing an increase in the capacity of transmission and a reliable reception without placing a burden on a transmission path carrier, and therefore it is impossible to solve the above-described problem.